From CMOS transistors to CMOS spin qubits
Marc Sanquer
INAC/PHELIQS/LATEQS CEA & UGA
Mardi 14/03/2017, 14h00-15h00
Bât. K, Salle R. Lemaire (K223), Institut Néel

ATTENTION : en raison de la mise en application avancée du plan Vigipirate, toutes les personnes qui ne possèdent pas de badge CNRS doivent nous signaler leur venue en précisant avant lundi 13 mars 15h45, afin d’ajouter leur nom à la liste des personnes autorisées à entrer sur le site.

Classical digital electronics relies on CMOS transistors. An optimal (speed-power trade off) inverter mobilizes approximately 5,000 carriers charging a capacitance (gate and parasitic interconnect) of typically 10-15F around 0,5V.

It is possible to make the transistor working in the single carrier regime at low temperature [1] ( even at 300K at the cost of a large process variability, however [2]) by a slight modification of the CMOS design ( underlapped geometry).

This permits to fabricate a CMOS spin qubit which inherits the figures-of-merit of one of the most advanced CMOS device : the FDSOI nanowire CMOS. Other elements needed to control and read the qubit can also be done within the same technology.

I will show the advantages offered by this technology in the perspective of doing quantum dots and spin quantum bits. I will present briefly the properties of our full-electrical hole CMOS spin qubit [3] and our ideas to realize a full-electrical electron CMOS spin qubit [4].

 

1 M. Hofheinz et al. APL 89, 143504 (2006)

2 R. Lavieville et al. Nano Lett., 15, 2958 (2015)

3 R. Maurand et al. Nature Comm. 7, 13575 (2016)

4 A. Corna et al. in preparation

Contact : Michel BENINI

 

Retour en haut