- Epitaxy of Silicon and Germanium nanostructures on ultrathin oxides
A. Barski, M. Derivaz, R. Dianoux, P. Gentile, N. Magnea, P. Noé, J.L. Rouvière, P. Mur CEA LETI, P. Besson ST Microelectronics.

Epitaxy of Silicon and Germanium nanostructures on ultrathin oxides During the last ten years, silicon, germanium, or silicon-germanium quantum dots embedded in an insulator have been studied extensively for their meso-scopic behavior. They have potential applications not only for silicon based optoelectronic devices, but also for room temperature operation of single electron memories and/or resonant tunneling structures. Ultra-thin oxides layers (<2nm) are currently basic dielectrics materials for those nanoscale Si/Ge based - electronics devices. The thickness control and morphology of these ultra-thin oxides becomes extremely important since a 0.1 nm increase in root-mean-square (rms) surface roughness increases the leakage current by a factor of 10 through a 1 nm thick silicon oxide. In this repport we describe: (i) the results of scanning tunneling microscopy (STM) investigations of the morphology of an ultra-thin silicon oxide layers and (ii) the growth by molecular beam epitaxy of nanometric size single crystal dots through an ultra-thin dielectric layer. Columnar dots grown through the 1.2 nm thick silicon oxide were used as nucleation centers for the subsequent lateral epitaxy of silicon on silicon oxide. These structures are the first step towards the realization of SiO2/Si/SiO2 tunneling devices.


Scanning tunneling microscopy investigations of ultra-thin silicon oxides


Scanning tunneling microscopy (STM) was used to investigate the morphology and electric properties of thin silicon oxide layers (thickness less than 2 nm). Silicon wafers were cleaned via a chemical process called “diluted dynamic cleaning”. This cleaning procedure produces a 0.8 nm thick native silicon oxide. The roughness of this native oxide is about 0.18 nm and determines the roughness of the surface of subsequently grown, by a standard Rapid Thermal Oxidation (RTO) procedure, silicon oxide layer. In figure 1 we show an STM image of a 1.2 nm thick silicon oxide grown by a RTO method on the 0.8 nm thick native oxide. When the oxide is grown by using a RTO method on an atomically flat surface, the roughness is drastically reduced to 0.065 nm and the atomic steps of the silicon (001) surface are clearly observed [1].


Epitaxy of Silicon and Germanium nanostructures on ultra-thin oxides


Ultra-thin (1.2 nm to 2 nm thick) silicon oxide layers have been used as starting surfaces for epitaxial growth, by molecular beam epitaxy, of high density, nanometric-size germanium and silicon dots through the silicon oxide. Thermal treatment at a relatively high temperature of 720-750°C of the polycrystalline layer of silicon or germanium, deposited on silicon oxide, induces the localized de-oxidation of the silicon surface and subsequent growth of epitaxial dots on the silicon (001) substrate [2]. The density of dots can be as high as 5*1011/cm2< and their diameter as small as 2 to 10 nm. In Fig. 3, we show the Atomic Force Microscopy (AFM) image of germanium dots grown through the silicon oxide and in Fig. 4 the High Resolution Transmission electron microscopy (HRTEM) image of a dot showing clearly the “bridge” between the Si substrate and the epitaxial island. The columnar form of dots grown through the silicon oxide in epitaxy with silicon has been recently confirmed by Iso-Strain Scattering investigations performed on the ID1 beamline at the ESRF [3].


Nanometric size ordered silicon dots grown through the silicon oxide can be used as a nucleation centers for subsequent silicon lateral epitaxy. Growing of thin well of Si over SiO2 barrier is the first sep to realize SiO2/Si/SiO2 tunneling devices. The width of extremely flat square-shaped island is almost 0.3 microns and the underlaying thin silicon oxide layer can be clearly observed by high resolution transmission electron microscopy (see figure 6). Only a few defects can be observed (see Fig. 5) at the edge of the single crystal island grown in epitaxial relationship to the silicon substrate. For future tunneling devices the thickness of the silicon layer deposited on silicon oxide has to be about 5 nm. Recently, we have successfully grown such thin silicon islands of a very high crystalline quality, as confirmed by preliminary HRTEM observations. [1] P. Gentile, J. Eymery, F. Gustavo, P. Mur, P. Besson, and J. M. Hartmann, accepted in J. of Non Cryst. Solids. [2] A. Barski, M. Derivaz, J. L. Rouvière, and D. Buttard, Appl. Phys. Lett. 77, 3541 (2000). [3] M. Derivaz, P. Noé, R. Dianoux, A. Barski, T. Schülli, and T.H. Metzger, Appl. Phys. Lett., 81, 3843 (2002).


Last update : 10/19 2016 (73)


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